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Introduction to Sinara
Introduction to Micro TCA
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Metlino
FPGA bootstrapping
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Sayma RTM
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Sayma RTM
Project description
Functional specifications:
Product view
Routing
I/O connections
Transceiver connections
Clocking
FPGA Oscillators
JESD204 synchronization procedure
Sayma RTM clock chip connections
Clock constraints
I2C connections
Board overview
GPIO header pinout
RF Front-End Mezzanines
TestMod
BaseMod
MixMod
Mezzanines Mechanical Specification
Sensors
Temperature
Power supply
Power configuration
Maximum power draw for each Mezzaninne
FPGA signal tables
AMC to RTM FPGA connectivity
Mezzanine0 IO
Mezzanine1 IO
Full FPGA signal table
PCB technical information
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