FPGA signal tables

AMC to RTM FPGA connectivity

AMC FPGA ball

AMC FPGA signal

AMC signal name

RTM connector pin

RTM FPGA ball

RTM FPGA signal

RTM signal name

AK5

MGTHTXN3_224

GT16TX_N

J1-B8

E3

MGTPRXN0_216

RTM_FPGA_GTP_Rx0_N

AK6

MGTHTXP3_224

GT16TX_P

J1-A8

E4

MGTPRXP0_216

RTM_FPGA_GTP_Rx0_P

AJ3

MGTHRXN3_224

GT16RX_N

J1-B10

H1

MGTPTXN0_216

RTM_FPGA_GTP_Tx0C_N

AJ4

MGTHRXP3_224

GT16RX_P

J1-A10

H2

MGTPTXP0_216

RTM_FPGA_GTP_Tx0C_P

G9

IO_L11N_T1U_N9_GC_66

LVDS1_CC_N

J2-B7

U17

IO_L16N_T2_A15_D31_14

RTM_UART_Rx

F9

IO_L11P_T1U_N8_GC_66

LVDS1_CC_P

J2-A7

T17

IO_L16P_T2_CSI_B_14

RTM_UART_Tx

J25

IO_L4N_T0U_N7_DBC_AD7N_A25_65

RTM_FPGA_CCLK

J2-A10

E8

CCLK_0

FPGA_CFG_CCLK

K27

IO_L3N_T0L_N3_AD15N_A27_65

RTM_FPGA_DONE

J2-A9

F12

DONE_0

FPGA_CFG_DONE

G25

IO_L2P_T0L_N2_FOE_B_65

RTM_FPGA_INIT_B

J2-B8

T10

INIT_B_0

FPGA_CFG_INIT_B

J23

IO_L6P_T0U_N10_AD6P_A20_65

RTM_FPGA_PROGRAM_B

J2-B9

P10

PROGRAM_B_0

FPGA_CFG_PROGRAM_B

K26

IO_L3P_T0L_N4_AD15P_A26_65

RTM_FPGA_DIN

J2-B10

L17

IO_L1N_T0_D01_DIN_14

FPGA_CFG_DIN

A13 (or B2)

IO_L23P_T3U_N8_66 (or MGTHRXP2_228)

LVDS15_P (or GT1RX_P)

J1-C9

U2

IO_L15P_T2_DQS_34

LVDS25_P

A12 (or B1)

IO_L23N_T3U_N9_66 (or MGTHRXN2_228)

LVDS15_N (or GT1RX_N)

J1-D9

U1

IO_L15N_T2_DQS_34

LVDS25_N

D13 (or E4)

IO_L24P_T3U_N10_66 (or MGTHRXP0_228)

LVDS17_P (or GT3RX_P)

J1-C7

P4

IO_L12P_T1_MRCC_34

LVDS26_CC_P

C13 (or E3)

IO_L24N_T3U_N11_66 (or MGTHRXP0_228)

LVDS17_N (or GT3RX_N)

J1-D7

P3

IO_L12N_T1_MRCC_34

LVDS26_CC_N

K11 (or D2)

IO_L15P_T2L_N4_AD11P_66 (or MGTHRXP1_228)

LVDS16_P (or GT2RX_P)

J1-C8

V3

IO_L16P_T2_34

LVDS27_P

J11 (or D1)

IO_L15N_T2L_N5_AD11N_66 (or MGTHRXN1_228)

LVDS16_N (or GT2RX_N)

J1-D8

V2

IO_L16N_T2_34

LVDS27_N

J1 on RTM is connected to J11 on AMC. J2 on RTM is connected to J10 on AMC.

Mezzanine0 IO

FPGA Pin

Pin Name

Net name

Mezzanine Pin (J11A)

U16

IO_L17N_T2_A13_D29_14

MEZZ0_IO0

F37

V16

IO_L18P_T2_A12_D28_14

MEZZ0_IO1

G37

V17

IO_L18N_T2_A11_D27_14

MEZZ0_IO2

H37

R13

IO_L19P_T3_A10_D26_14

MEZZ0_IO3

J39

T13

IO_L19N_T3_A09_D25_VREF_14

MEZZ0_IO4

J38

U14

IO_L20P_T3_A08_D24_14

MEZZ0_IO5

J37

V14

IO_L20N_T3_A07_D23_14

MEZZ0_IO6

K39

V12

IO_L21P_T3_DQS_14

MEZZ0_IO7

K38

V13

IO_L21N_T3_DQS_A06_D22_14

MEZZ0_IO8

K37

T12

IO_L22P_T3_A05_D21_14

MEZZ0_IO9

E37

U12

IO_L22N_T3_A04_D20_14

MEZZ0_IO10

D37

U11

IO_L23P_T3_A03_D19_14

MEZZ0_IO11

C37

V11

IO_L23N_T3_A02_D18_14

MEZZ0_IO12

B37

U9

IO_L24P_T3_A01_D17_14

MEZZ0_IO13

B36

V9

IO_L24N_T3_A00_D16_14

MEZZ0_IO14

A37

U10

IO_25_14

MEZZ0_IO15

A36

E18

IO_L24N_T3_RS0_15

MEZZ0_LVDS0_N

A39

F17

IO_L24P_T3_RS1_15

MEZZ0_LVDS0_P

A38

F18

IO_L19N_T3_A21_VREF_15

MEZZ0_LVDS1_N

B39

G17

IO_L19P_T3_A22_15

MEZZ0_LVDS1_P

B38

H18

IO_L23N_T3_FWE_B_15

MEZZ0_LVDS2_N

C39

H17

IO_L23P_T3_FOE_B_15

MEZZ0_LVDS2_P

C38

F15

IO_L21N_T3_DQS_A18_15

MEZZ0_LVDS3_N

D39

G15

IO_L21P_T3_DQS_15

MEZZ0_LVDS3_P

D38

F14

IO_L22N_T3_A16_15

MEZZ0_LVDS4_N

E39

G14

IO_L22P_T3_A17_15

MEZZ0_LVDS4_P

E38

D18

IO_L17N_T2_A25_15

MEZZ0_LVDS5_N

F39

E17

IO_L17P_T2_A26_15

MEZZ0_LVDS5_P

F38

C18

IO_L18N_T2_A23_15

MEZZ0_LVDS6_N

G39

C17

IO_L18P_T2_A24_15

MEZZ0_LVDS6_P

G38

G16

IO_L20N_T3_A19_15

MEZZ0_LVDS7_N

H39

H16

IO_L20P_T3_A20_15

MEZZ0_LVDS7_P

H38

Mezzanine1 IO

FPGA Pin

Pin Name

Net name

Mezzanine Pin (J11B)

J16

IO_L2N_T0_D03_14

MEZZ1_IO0

F37

K18

IO_L3N_T0_DQS_EMCCLK_14

MEZZ1_IO1

G37

K17

IO_L4P_T0_D04_14

MEZZ1_IO2

H37

L18

IO_L4N_T0_D05_14

MEZZ1_IO3

J39

J14

IO_L5P_T0_D06_14

MEZZ1_IO4

J38

K15

IO_L5N_T0_D07_14

MEZZ1_IO5

J37

L15

IO_L6P_T0_FCS_B_14

MEZZ1_IO6

K39

M15

IO_L6N_T0_D08_VREF_14

MEZZ1_IO7

K38

M16

IO_L7P_T1_D09_14

MEZZ1_IO8

K37

M17

IO_L7N_T1_D10_14

MEZZ1_IO9

E37

M14

IO_L8P_T1_D11_14

MEZZ1_IO10

D37

N14

IO_L8N_T1_D12_14

MEZZ1_IO11

C37

N16

IO_L9P_T1_DQS_14

MEZZ1_IO12

B37

N17

IO_L9N_T1_DQS_D13_14

MEZZ1_IO13

B36

N18

IO_L10P_T1_D14_14

MEZZ1_IO14

A37

P18

IO_L10N_T1_D15_14

MEZZ1_IO15

A36

A14

IO_L8N_T1_AD10N_15

MEZZ1_LVDS0_N

A39

A13

IO_L8P_T1_AD10P_15

MEZZ1_LVDS0_P

A38

A12

IO_L7N_T1_AD2N_15

MEZZ1_LVDS1_N

B39

B12

IO_L7P_T1_AD2P_15

MEZZ1_LVDS1_P

B38

C12

IO_L6N_T0_VREF_15

MEZZ1_LVDS2_N

C39

D11

IO_L6P_T0_15

MEZZ1_LVDS2_P

C38

A10

IO_L5N_T0_AD9N_15

MEZZ1_LVDS3_N

D39

B10

IO_L5P_T0_AD9P_15

MEZZ1_LVDS3_P

D38

B11

IO_L4N_T0_15

MEZZ1_LVDS4_N

E39

C11

IO_L4P_T0_15

MEZZ1_LVDS4_P

E38

A9

IO_L3N_T0_DQS_AD1N_15

MEZZ1_LVDS5_N

F39

B9

IO_L3P_T0_DQS_AD1P_15

MEZZ1_LVDS5_P

F38

C9

IO_L2N_T0_AD8N_15

MEZZ1_LVDS6_N

G39

D9

IO_L2P_T0_AD8P_15

MEZZ1_LVDS6_P

G38

C8

IO_L1N_T0_AD0N_15

MEZZ1_LVDS7_N

H39

D8

IO_L1P_T0_AD0P_15

MEZZ1_LVDS7_P

H38

Full FPGA signal table

FPGA Pin

Pin Name

Net

A1

GND

GND

A2

MGTAVTT

MGTAVTT

A3

MGTPRXN1_216

RTM_FPGA_GTP_Rx1_N

A4

MGTPRXP1_216

RTM_FPGA_GTP_Rx1_P

A5

GND

GND

A6

MGTRREF_216

NetIC27_A6

A7

GND

GND

A8

GND

GND

A9

IO_L3N_T0_DQS_AD1N_15

MEZZ1_LVDS5_N

A10

IO_L5N_T0_AD9N_15

MEZZ1_LVDS3_N

A11

GND

GND

A12

IO_L7N_T1_AD2N_15

MEZZ1_LVDS1_N

A13

IO_L8P_T1_AD10P_15

MEZZ1_LVDS0_P

A14

IO_L8N_T1_AD10N_15

MEZZ1_LVDS0_N

A15

IO_L10N_T1_AD11N_15

IO_L10_N

A16

VCCO_15

P2V5F

A17

IO_L15N_T2_DQS_ADV_B_15

IO_L15_N

A18

GND

GND

B1

MGTPTXN3_216

RTM_FPGA_GTP_Tx3C_N

B2

MGTPTXP3_216

RTM_FPGA_GTP_Tx3C_P

B3

GND

GND

B4

MGTAVCC

MGTAVCC

B5

MGTREFCLK1N_216

CDR_CLK_CTRL.CDR_CLK

B6

MGTREFCLK1P_216

CDR_CLK_CTRL.CDR_CLK

B7

GND

GND

B8

GND

GND

B9

IO_L3P_T0_DQS_AD1P_15

MEZZ1_LVDS5_P

B10

IO_L5P_T0_AD9P_15

MEZZ1_LVDS3_P

B11

IO_L4N_T0_15

MEZZ1_LVDS4_N

B12

IO_L7P_T1_AD2P_15

MEZZ1_LVDS1_P

B13

VCCO_15

P2V5F

B14

IO_L10P_T1_AD11P_15

IO_L10_P

B15

IO_L9N_T1_DQS_AD3N_15

NetIC27_B15

B16

IO_L15P_T2_DQS_15

IO_L15_P

B17

IO_L16N_T2_A27_15

IO_L16_N

B18

GND

GND

C1

MGTAVTT

MGTAVTT

C2

GND

GND

C3

MGTPRXN2_216

RTM_FPGA_GTP_Rx2_N

C4

MGTPRXP2_216

RTM_FPGA_GTP_Rx2_P

C5

MGTAVCC

MGTAVCC

C6

GND

GND

C7

GND

GND

C8

IO_L1N_T0_AD0N_15

MEZZ1_LVDS7_N

C9

IO_L2N_T0_AD8N_15

MEZZ1_LVDS6_N

C10

VCCO_15

P2V5F

C11

IO_L4P_T0_15

MEZZ1_LVDS4_P

C12

IO_L6N_T0_VREF_15

MEZZ1_LVDS2_N

C13

IO_L11N_T1_SRCC_15

IO_L11_SRCC_N

C14

IO_L9P_T1_DQS_AD3P_15

NetIC27_C14

C15

GND

GND

C16

IO_L16P_T2_A28_15

IO_L16_P

C17

IO_L18P_T2_A24_15

MEZZ0_LVDS6_P

C18

IO_L18N_T2_A23_15

MEZZ0_LVDS6_N

D1

MGTPTXN2_216

RTM_FPGA_GTP_Tx2C_N

D2

MGTPTXP2_216

RTM_FPGA_GTP_Tx2C_P

D3

GND

GND

D4

GND

GND

D5

MGTREFCLK0N_216

RTM_FPGA_GTP_CLKC_P

D6

MGTREFCLK0P_216

RTM_FPGA_GTP_CLKC_N

D7

GND

GND

D8

IO_L1P_T0_AD0P_15

MEZZ1_LVDS7_P

D9

IO_L2P_T0_AD8P_15

MEZZ1_LVDS6_P

D10

IO_0_15

NetIC27_D10

D11

IO_L6P_T0_15

MEZZ1_LVDS2_P

D12

GND

GND

D13

IO_L11P_T1_SRCC_15

IO_L11_SRCC_P

D14

IO_L12N_T1_MRCC_15

GPIO_CC_N

D15

IO_L13N_T2_MRCC_15

REF2_N

D16

IO_L14N_T2_SRCC_15

IO_L14_SRCC_N

D17

VCCO_15

P2V5F

D18

IO_L17N_T2_A25_15

MEZZ0_LVDS5_N

E1

MGTAVTT

MGTAVTT

E2

GND

GND

E3

MGTPRXN0_216

RTM_FPGA_GTP_Rx0_N

E4

MGTPRXP0_216

RTM_FPGA_GTP_Rx0_P

E5

MGTAVCC

MGTAVCC

E6

GND

GND

E7

GND

GND

E8

CCLK_0

RTM_FPGA_CFG.FPGA_CF

E9

GND

GND

E10

VCCO_0

P3V3F

E11

VCCBATT_0

P1V8F

E12

CFGBVS_0

NetIC27_E12

E13

IO_L12P_T1_MRCC_15

GPIO_CC_P

E14

VCCO_15

P2V5F

E15

IO_L13P_T2_MRCC_15

REF2_P

E16

IO_L14P_T2_SRCC_15

IO_L14_SRCC_P

E17

IO_L17P_T2_A26_15

MEZZ0_LVDS5_P

E18

IO_L24N_T3_RS0_15

MEZZ0_LVDS0_N

F1

MGTPTXN1_216

RTM_FPGA_GTP_Tx1C_N

F2

MGTPTXP1_216

RTM_FPGA_GTP_Tx1C_P

F3

MGTAVTT

MGTAVTT

F4

GND

GND

F5

MGTAVCC

MGTAVCC

F6

GND

GND

F7

VCCINT

P1V0

F8

TCK_0

NetIC27_F8

F9

VCCINT

P1V0

F10

GND

GND

F11

VCCBRAM

VCCBRAM

F12

DONE_0

RTM_FPGA_CFG.FPGA_CF

F13

M2_0

NetIC27_F13

F14

IO_L22N_T3_A16_15

MEZZ0_LVDS4_N

F15

IO_L21N_T3_DQS_A18_15

MEZZ0_LVDS3_N

F16

GND

GND

F17

IO_L24P_T3_RS1_15

MEZZ0_LVDS0_P

F18

IO_L19N_T3_A21_VREF_15

MEZZ0_LVDS1_N

G1

GND

GND

G2

MGTAVTT

MGTAVTT

G3

MGTPRXN3_216

RTM_FPGA_GTP_Rx3_N

G4

MGTPRXP3_216

RTM_FPGA_GTP_Rx3_P

G5

GND

GND

G6

GND

GND

G7

GND

GND

G8

VCCINT

P1V0

G9

GND

GND

G10

VCCBRAM

VCCBRAM

G11

GND

GND

G12

VCCAUX

VCCAUX

G13

GND

GND

G14

IO_L22P_T3_A17_15

MEZZ0_LVDS4_P

G15

IO_L21P_T3_DQS_15

MEZZ0_LVDS3_P

G16

IO_L20N_T3_A19_15

MEZZ0_LVDS7_N

G17

IO_L19P_T3_A22_15

MEZZ0_LVDS1_P

G18

VCCO_15

P2V5F

H1

MGTPTXN0_216

RTM_FPGA_GTP_Tx0C_N

H2

MGTPTXP0_216

RTM_FPGA_GTP_Tx0C_P

H3

GND

GND

H4

GND

GND

H5

GND

GND

H6

GND

GND

H7

VCCINT

P1V0

H8

GND

GND

H9

VCCINT

P1V0

H10

GND

GND

H11

VCCBRAM

VCCBRAM

H12

GND

GND

H13

VCCAUX

VCCAUX

H14

IO_25_15

NetIC27_H14

H15

VCCO_15

P2V5F

H16

IO_L20P_T3_A20_15

MEZZ0_LVDS7_P

H17

IO_L23P_T3_FOE_B_15

MEZZ0_LVDS2_P

H18

IO_L23N_T3_FWE_B_15

MEZZ0_LVDS2_N

J1

GND

GND

J2

GND

GND

J3

GND

GND

J4

IO_L2N_T0_34

DAC1_SPI_CSn

J5

IO_L2P_T0_34

DAC1_RESETn

J6

IO_0_34

NetIC27_J6

J7

GND

GND

J8

VCCINT

P1V0

J9

GNDADC_0

GNDADC

J10

VCCADC_0

NetC288_1

J11

GND

GND

J12

VCCINT

P1V0

J13

GND

GND

J14

IO_L5P_T0_D06_14

MEZZ1_IO4

J15

IO_L2P_T0_D02_14

HMC_SPI_SDO

J16

IO_L2N_T0_D03_14

MEZZ1_IO0

J17

GND

GND

J18

IO_L3P_T0_DQS_PUDC_B_14

HMC7043_RESET

K1

IO_L3N_T0_DQS_34

DAC1_SPI_SDIO

K2

IO_L3P_T0_DQS_34

DAC1_SPI_SCLK

K3

IO_L4P_T0_34

DAC1_SPI_SDO

K4

GND

GND

K5

IO_L1N_T0_34

DAC1_IRQn

K6

IO_L1P_T0_34

NetIC27_K6

K7

VCCINT

P1V0

K8

GND

GND

K9

VREFN_0

GND

K10

VP_0

GND

K11

VCCINT

P1V0

K12

GND

GND

K13

VCCAUX

VCCAUX

K14

GND

GND

K15

IO_L5N_T0_D07_14

MEZZ1_IO5

K16

IO_L1P_T0_D00_MOSI_14

HMC830_SPI_SEN

K17

IO_L4P_T0_D04_14

MEZZ1_IO2

K18

IO_L3N_T0_DQS_EMCCLK_14

MEZZ1_IO1

L1

GND

GND

L2

IO_L4N_T0_34

DAC1_TXEN0

L3

IO_L5N_T0_34

RESET_Rn

L4

IO_L5P_T0_34

DAC1_TXEN1

L5

IO_L6P_T0_34

SI5324_RST_2V5

L6

VCCO_34

P2V5F

L7

GND

GND

L8

VCCINT

P1V0

L9

VN_0

GND

L10

VREFP_0

GND

L11

GND

GND

L12

VCCINT

P1V0

L13

GND

GND

L14

IO_0_14

HMC_SPI_GPIO

L15

IO_L6P_T0_FCS_B_14

MEZZ1_IO6

L16

VCCO_14

P3V3F

L17

IO_L1N_T0_D01_DIN_14

RTM_FPGA_CFG.FPGA_CF

L18

IO_L4N_T0_D05_14

MEZZ1_IO3

M1

IO_L7N_T1_34

REC_CLOCK_N

M2

IO_L7P_T1_34

REC_CLOCK_P

M3

VCCO_34

P2V5F

M4

IO_L10P_T1_34

HW_ID1

M5

IO_L6N_T0_VREF_34

WR_CLK_SEL_2V5

M6

IO_L8P_T1_34

Helper_DCXO_OE_2V5

M7

VCCINT

P1V0

M8

GND

GND

M9

DXN_0

NetIC27_M9

M10

DXP_0

NetIC27_M10

M11

VCCINT

P1V0

M12

GND

GND

M13

VCCAUX

VCCAUX

M14

IO_L8P_T1_D11_14

MEZZ1_IO10

M15

IO_L6N_T0_D08_VREF_14

MEZZ1_IO7

M16

IO_L7P_T1_D09_14

MEZZ1_IO8

M17

IO_L7N_T1_D10_14

MEZZ1_IO9

M18

GND

GND

N1

IO_L9P_T1_DQS_34

HW_ID3

N2

IO_L11N_T1_SRCC_34

Helper_DCXO_N

N3

IO_L11P_T1_SRCC_34

Helper_DCXO_P

N4

IO_L10N_T1_34

HW_ID0

N5

GND

GND

N6

IO_L8N_T1_34

Main_DCXO_OE_2V5

N7

GND

NetIC27_N7

N8

VCCINT

P1V0

N9

GND

GND

N10

VCCINT

P1V0

N11

GND

GND

N12

VCCINT

P1V0

N13

GND

GND

N14

IO_L8N_T1_D12_14

MEZZ1_IO11

N15

GND

GND

N16

IO_L9P_T1_DQS_14

MEZZ1_IO12

N17

IO_L9N_T1_DQS_D13_14

MEZZ1_IO13

N18

IO_L10P_T1_D14_14

MEZZ1_IO14

P1

IO_L9N_T1_DQS_34

HW_ID2

P2

GND

GND

P3

IO_L12N_T1_MRCC_34

LVDS26_CC_N

P4

IO_L12P_T1_MRCC_34

LVDS26_CC_P

P5

IO_L19N_T3_VREF_34

DAC0_SPI_SDO

P6

IO_L19P_T3_34

DAC0_SPI_SDIO

P7

VCCO_34

P2V5F

P8

GND

GND

P9

VCCINT

P1V0

P10

PROGRAM_B_0

RTM_FPGA_CFG.FPGA_CF

P11

VCCINT

P1V0

P12

GND

GND

P13

VCCAUX

VCCAUX

P14

IO_L12P_T1_MRCC_14

Main_DCXO_SCL

P15

IO_L11P_T1_SRCC_14

RTM_FPGA_SCL

P16

IO_L11N_T1_SRCC_14

RTM_FPGA_SDA

P17

VCCO_14

P3V3F

P18

IO_L10N_T1_D15_14

MEZZ1_IO15

R1

IO_L13N_T2_MRCC_34

CDR_CLK_CLEAN2_N

R2

IO_L13P_T2_MRCC_34

CDR_CLK_CLEAN2_P

R3

IO_L14P_T2_SRCC_34

RTM_FPGA_SYSREF0_P

R4

VCCO_34

P2V5F

R5

IO_L21P_T3_DQS_34

RTM_FPGA_SYSREF1_P

R6

IO_25_34

REF_CLK_SRC_EXT_SEL

R7

IO_L22P_T3_34

NetIC27_R7

R8

TMS_0

NetIC27_R8

R9

GND

GND

R10

VCCO_0

P3V3F

R11

M1_0

NetIC27_R11

R12

M0_0

NetIC27_R12

R13

IO_L19P_T3_A10_D26_14

MEZZ0_IO3

R14

VCCO_14

P3V3F

R15

IO_L12N_T1_MRCC_14

I2C_SW_FPGA_RESETn

R16

IO_L14P_T2_SRCC_14

Helper_DCXO_SDA

R17

IO_L14N_T2_SRCC_14

HMC7043_SLEN

R18

IO_L15P_T2_DQS_RDWR_B_14

HMC_SPI_SDATA

T1

VCCO_34

P2V5F

T2

IO_L14N_T2_SRCC_34

RTM_FPGA_SYSREF0_N

T3

IO_L17N_T2_34

DAC0_RESETn

T4

IO_L17P_T2_34

DAC0_IRQn

T5

IO_L21N_T3_DQS_34

RTM_FPGA_SYSREF1_N

T6

GND

GND

T7

IO_L22N_T3_34

LED

T8

TDO_0

NetIC27_T8

T9

TDI_0

NetIC27_T9

T10

INIT_B_0

RTM_FPGA_CFG.FPGA_CF

T11

VCCO_14

P3V3F

T12

IO_L22P_T3_A05_D21_14

MEZZ0_IO9

T13

IO_L19N_T3_A09_D25_VREF_14

MEZZ0_IO4

T14

IO_L13P_T2_MRCC_14

CLK50

T15

IO_L13N_T2_MRCC_14

Helper_DCXO_SCL

T16

GND

GND

T17

IO_L16P_T2_CSI_B_14

RTM_UART_Tx

T18

IO_L15N_T2_DQS_DOUT_CSO_B_14

HMC_SPI_SCLK

U1

IO_L15N_T2_DQS_34

LVDS25_N

U2

IO_L15P_T2_DQS_34

LVDS25_P

U3

GND

GND

U4

IO_L18P_T2_34

DAC0_SPI_CSn

U5

IO_L20N_T3_34

DAC0_TXEN1

U6

IO_L20P_T3_34

DAC0_TXEN0

U7

IO_L23P_T3_34

NetIC27_U7

U8

VCCO_14

P3V3F

U9

IO_L24P_T3_A01_D17_14

MEZZ0_IO13

U10

IO_25_14

MEZZ0_IO15

U11

IO_L23P_T3_A03_D19_14

MEZZ0_IO11

U12

IO_L22N_T3_A04_D20_14

MEZZ0_IO10

U13

GND

GND

U14

IO_L20P_T3_A08_D24_14

MEZZ0_IO5

U15

IO_L17P_T2_A14_D30_14

Main_DCXO_SDA

U16

IO_L17N_T2_A13_D29_14

MEZZ0_IO0

U17

IO_L16N_T2_A15_D31_14

RTM_UART_Rx

U18

VCCO_14

P3V3F

V1

GND

GND

V2

IO_L16N_T2_34

LVDS27_N

V3

IO_L16P_T2_34

LVDS27_P

V4

IO_L18N_T2_34

DAC0_SPI_SCLK

V5

VCCO_34

P2V5F

V6

IO_L23N_T3_34

SI5324_INT_ALM_2V5

V7

IO_L24N_T3_34

EN_PWR_HMC830_2V5

V8

IO_L24P_T3_34

HMC_7043_OUT_EN_2V5

V9

IO_L24N_T3_A00_D16_14

MEZZ0_IO14

V10

GND

GND

V11

IO_L23N_T3_A02_D18_14

MEZZ0_IO12

V12

IO_L21P_T3_DQS_14

MEZZ0_IO7

V13

IO_L21N_T3_DQS_A06_D22_14

MEZZ0_IO8

V14

IO_L20N_T3_A07_D23_14

MEZZ0_IO6

V15

VCCO_14

P3V3F

V16

IO_L18P_T2_A12_D28_14

MEZZ0_IO1

V17

IO_L18N_T2_A11_D27_14

MEZZ0_IO2

V18

GND

GND